Overcoming electrical current leaks in modern memory devices

by | Mar 23, 2021

A new device significantly decreases unwanted current leakage from memory devices, which could help reduce the greenhouse gas emissions of future data centers.

Image credit: Shutterstock/Oleksiy Mark

Resistive random access memory (RRAM) is a strong contender for the next generation of memory chips due to its compact device size, high storage capacity, and the feasibility of making smarter, bio-mimicking electronic chips.

However, all these interesting functionalities have not yet manifested into commercial application primarily due to “leakage current”, also known as a sneak-path current, a problem that exists in virtually every electronic chip and is difficult to control.

Sneak-path current reduces the reliability and efficiency of electronics as it can change the stored data in a device and results in excess heat generation. When considering that heat generation in data centers has been reported to contribute to 3-5% of global carbon emissions. Developing new, modern memory devices that minimize this leakage current and the heat it generates is of great interest in mitigating the rising challenge of climate change.  

Multiple solutions have been investigated to eliminate sneak-path problems in RRAM devices, but they usually have to compensate and lose some functionality, such as data storage capacity, fabrication simplicity, or memory performance.

A new study conducted by a team of RMIT University researchers introduces a novel device structure that significantly reduces sneak-path current without making these compromises.

This work builds on an earlier technology from the RMIT University team, who presented high-performance memory devices for logic operations and neuromorphic devices. The new prototype structure can increase reliability and accuracy of memory and neuromorphic devices.

“Our technology can considerably increase the reliability, efficiency, and storage capacity on a single chip based on RRAM technology,” Sriram said. “The prototype device we have developed is a major leap towards the practical deployment of emerging RRAM devices.”

Unlike conventional solutions, he added, which require two devices connected to each other on a chip—where one is dedicated to memory and the other to leakage current reduction—the prototype delivers both functionalities in a single powerful device.

Dual functionality in a single device

Typically, to minimize sneak-path current, conventional technologies incorporate devices called selectors into each memory device chip. But, as previously mentioned, this poses a problem as there is only limited space on the chip and additional devices only reduce storage capacity or functionality.

The new device simply replaces a key material used in the original memory device that was dedicated to only memory performance with a bi-layer stack of two materials, where one layer serves as a memory and the other obstructs the sneaking current. The incorporation of bi-layer stacks made up of two materials with different inherent properties improves the accuracy and efficiency of memory arrays through a minor tweak of the original device structure, while the storage capacity and memory performance remain intact.

This work shows the combined functionality of selector and memory in a single device for the first time, without compromising performance parameters of original memory device.

The new device achieved a six-fold reduction in a sneak-path current without any changes to memory array architecture, and its fabrication process and material choices are compatible with current electronics and silicon technologies, enabling straightforward integration.

This is the first step in achieving dual functionality where both a selector and memory functionalities are incorporated into a single device without comprising performance parameters. While exciting, further research is needed to work towards scalability of this technology.

Reference: Shruti Nirantar, et al., Amorphous Metal Oxide Bilayers to Avoid Sneak‐Path Currents for High‐Density Resistive Memory Arrays, Advanced Intelligent Systems (2021). DOI: 10.1002/aisy.202000222